Phoenix BIOS Beep Codes
|
Code |
Beeps |
POST Routine Description |
|
02h | ||
|
03h |
Disable Non-Maskable Interrupt (NMI) | |
|
04h |
Get CPU type | |
|
06h |
Initialize system hardware | |
|
07h |
Disable shadow and execute code from the ROM. | |
|
08h |
Initialize chipset with initial POST values | |
|
09h |
Set IN POST flag | |
|
0Ah |
Initialize CPU registers | |
|
0Bh |
Enable CPU cache | |
|
0Ch |
Initialize caches to initial POST values | |
|
0Eh |
Initialize I/O component | |
|
0Fh |
Initialize the local bus IDE | |
|
10h |
Initialize Power Management | |
|
11h |
Load alternate registers with initial POST values | |
|
12h |
Restore CPU control word during warm boot | |
|
13h |
Initialize PCI Bus Mastering devices | |
|
14h |
Initialize keyboard controller | |
|
16h |
1-2-2-3 |
BIOS ROM checksum |
|
17h |
Initialize cache before memory autosize | |
|
18h |
8254 timer initialization | |
|
1Ah |
8237 DMA controller initialization | |
|
1Ch |
Reset Programmable Interrupt Controller | |
|
20h |
1-3-1-1 |
Test DRAM refresh |
|
22h |
1-3-1-3 |
Test 8742 Keyboard Controller |
|
24h |
Set ES segment register to 4 GB | |
|
28h |
Autosize DRAM | |
|
29h |
Initialize POST Memory Manager | |
|
2Ah |
Clear 215 KB base RAM | |
|
2Ch |
1-3-4-1 |
RAM failure on address line xxxx |
|
2Eh |
1-3-4-3 |
RAM failure on data bits xxxx of low byte of memory bus |
|
2Fh |
Enable cache before system BIOS shadow | |
|
32h |
Test CPU bus-clock frequency | |
|
33h |
Initialize Phoenix Dispatch Manager | |
|
36h |
Warm start shut down | |
|
38h |
Shadow system BIOS ROM | |
|
3Ah |
Autosize cache | |
|
3Ch |
Advanced configuration of chipset registers | |
|
3Dh |
Load alternate registers with CMOS values | |
|
41h |
Initialize extended memory for RomPilot. | |
|
42h |
Initialize interrupt vectors | |
|
45h |
POST device initialization | |
|
46h |
2-1-2-3 |
Check ROM copyright notice |
|
Code |
Beeps |
POST Routine Description |
|
47h |
Initialize I20 support | |
|
48h |
Check video configuration against CMOS | |
|
49h |
Initialize PCI bus and devices | |
|
4Ah |
Initialize all video adapters in system | |
|
4Bh |
QuietBoot start (optional) | |
|
4Ch |
Shadow video BIOS ROM | |
|
4Eh |
Display BIOS copyright notice | |
|
50h |
Display CPU type and speed | |
|
51h |
Initialize EISA board | |
|
52h |
Test keyboard | |
|
54h |
Set key click if enabled | |
|
55h |
Enable USB devices | |
|
58h |
2-2-3-1 |
Test for unexpected interrupts |
|
59h |
Initialize POST display service | |
|
5Ah |
Display prompt "Press F2 to enter SETUP" | |
|
5Bh |
Disable CPU cache | |
|
5Ch |
Test RAM between 512 and 640 KB | |
|
60h |
Test extended memory | |
|
62h |
Test extended memory address lines | |
|
64h |
Jump to User Patch1 | |
|
66h |
Configure advanced cache registers | |
|
67h |
Initialize Multi Processor APIC | |
|
68h |
Enable external and CPU caches | |
|
69h |
Setup System Management Mode (SMM) area | |
|
6Ah |
Display external L2 cache size | |
|
6Bh |
Load custom defaults (optional) | |
|
6Ch |
Display shadow-area message | |
|
6Eh |
Display possible high address for UMB recovery | |
|
70h |
Display error messages | |
|
72h |
Check for configuration errors | |
|
76h |
Check for keyboard errors | |
|
7Ch |
Set up hardware interrupt vectors | |
|
7Eh |
Initialize coprocessor if present | |
|
80h |
Disable onboard Super I/O ports and IRQs | |
|
81h |
Late POST device initialization | |
|
82h |
Detect and install external RS232 ports | |
|
83h |
Configure non-MCD IDE controllers | |
|
84h |
Detect and install external parallel ports | |
|
85h |
Initialize PC-compatible PnP ISA devices | |
|
86h |
Re-initialize onboard I/O ports | |
|
87h |
Configure Motherboard Configurable Devices (optional) | |
|
88h | ||
|
89h |
Enable Non-Maskable Interrupts (NMIs) | |
|
8Ah |
Initialize Extended BIOS Data Area |
|
Code |
Beeps |
POST Routine Description |
|
8Bh |
Test and initialize PS/2 mouse | |
|
8Ch |
Initialize floppy controller | |
|
8Fh |
Determine number of ATA drives (optional) | |
|
90h |
Initialize hard-disk controllers | |
|
91h |
Initialize local-bus hard-disk controllers | |
|
92h |
Jump to UserPatch2 | |
|
93h |
Build MPTABLE for multi-processor boards | |
|
95h |
Install CD ROM for boot | |
|
96h |
Clear huge ES segment register | |
|
97h |
Fixup Multi Processor table | |
|
98h |
1-2 |
Search for option ROMs. One long, two short beeps on checksum failure. |
|
99h |
Check for SMART drive (optional) | |
|
9Ah |
Shadow option ROMs | |
|
9Ch |
Set up Power Management | |
|
9Dh |
Initialize security engine (optional) | |
|
9Eh |
Enable hardware interrupts | |
|
9Fh |
Determine number of ATA and SCSI drives | |
|
A0h |
Set time of day | |
|
A2h |
Check key lock | |
|
A4h |
Initialize Typematic rate | |
|
A8h |
Erase F2 prompt | |
|
AAh |
Scan for F2 key stroke | |
|
ACh |
Enter SETUP | |
|
AEh |
Clear Boot flag | |
|
B0h |
Check for errors | |
|
B1h |
Inform RomPilot about the end of POST. | |
|
B2h |
POST done- prepare to boot operating system | |
|
B4h |
1 |
One short beep before boot |
|
B5h |
Terminate QuietBoot (optional) | |
|
B6h |
Check password (optional) | |
|
B7h |
Initialize ACPI BIOS | |
|
B9h |
Prepare Boot | |
|
BAh |
Initialize SMBIOS | |
|
BBh |
Initialize PnP Option ROMs | |
|
BCh |
Clear parity checkers | |
|
BDh |
Display MultiBoot menu | |
|
BEh |
Clear screen (optional) | |
|
BFh |
Check virus and backup reminders | |
|
C0h |
Try to boot with INT 19 | |
|
C1h |
Initialize POST Error Manager (PEM) | |
|
C2h |
Initialize error logging | |
|
C3h |
Initialize error display function | |
|
C4h |
Initialize system error handler | |
|
C5h |
PnPnd dual CMOS (optional) | |
|
C6h |
Initialize notebook docking (optional) |
|
Code |
Beeps |
POST Routine Description |
|
C7h |
Initialize notebook docking late | |
|
C8h |
Force check (optional) | |
|
C9h |
Extended checksum (optional) | |
|
CAh |
Redirect Int 15h to enable remote keyboard | |
|
CBh |
Redirect Int 13h to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk. | |
|
CCh |
Redirect Int 10h to enable remote serial video | |
|
CDh |
Re-map I/O and memory for PCMCIA | |
|
CEh |
Initialize digitizer and display message. | |
|
D2h |
Unknown interrupt | |
|
The following are for boot block in Flash ROM | ||
|
E0h |
Initialize the chipset | |
|
E1h |
Initialize the bridge | |
|
E2h |
Initialize the CPU | |
|
E3h |
Initialize the system timer | |
|
E4h |
Initialize system I/O | |
|
E5h |
Check force recovery boot | |
|
E6h |
Checksum BIOS ROM | |
|
E7h |
Go to BIOS | |
|
E8h |
Set Huge Segment | |
|
E9h |
Initialize Multi Processor | |
|
EAh |
Initialize OEM special code | |
|
EBh |
Initialize PIC and DMA | |
|
ECh |
Initialize Memory type | |
|
EDh |
Initialize Memory size | |
|
EEh | ||
|
EFh |
System memory test | |
|
F0h |
Initialize interrupt vectors | |
|
F1h |
Initialize Run Time Clock | |
|
F2h |
Initialize video | |
|
F3h |
Initialize System Management Mode | |
|
F4h |
1 |
Output one beep |
|
F5h |
Clear Huge Segment | |
|
F6h |
Boot to Mini DOS | |
|
F7h |
Boot to Full DOS | |
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